Digital Techniques

Number System and Codes

Logic Gates and Logic Families

  • Logic Gates – Symbols, Diodes/Transistors, Switch Circuit, and Logical Expression
  • Truth Tables of Logic Gates
  • Truth Tables of Universal Gates
  • Truth Tables of Special Purpose and Tri-State Gates
  • Laws of Boolean Algebra
  • Boolean Algebra – Duality Theorem
  • Boolean Algebra – Demorgans Theorem
  • Characteristics of Logic Families
  • Logic Families – Comparison of TTL
  • Logic Families – CMOS
  • Logic Families – Types of TTL and NAND Gates

Combinational Logic Circuits

  • Standard Boolean Representation – Sum of Product and Product of Sum
  • Standard Boolean Representation – Min-term and Max-term
  • Standard Boolean Representation – Conversion between POS and SOP forms
  • Standard Boolean Representation – Realization using NAND/NOR Gates
  • K-Map Reduction Techniques for Boolean Expression – Minimization of Boolean functions up to 4 variables (SOP and POS Form)
  • Design of Arithmetic Circuits and Code Converter using K-Map – Half and Full Adder, Half and Full Subtractor
  • Design of Arithmetic Circuits and Code Converter using K-Map – Gray to Binary and Binary to Gray
  • Arithmetic Circuits – Adder and Subtractor
  • Arithmetic Circuits – BCD Adder
  • Encoder/Decoder – Basics of Encoder
  • Encoder/Decoder – Basics of Decoder
  • Encoder/Decoder – Comparison of Encoder and Decoder
  • Encoder/Decoder – BCD (IC 7447) to 7 Segment Decoder/Driver
  • Multiplexer and Demultiplexer – Working of Multiplexer – Truth Table
  • Multiplexer and Demultiplexer – Applications of Multiplexer and Demultiplexer
  • Multiplexer and Demultiplexer – MUX Tree
  • Multiplexer and Demultiplexer – IC 74151 as MUX
  • Multiplexer and Demultiplexer – DEMUX Tree
  • Multiplexer and Demultiplexer – DEMUX as Decoder
  • Multiplexer and Demultiplexer – IC 74155 as DEMUX
  • Buffer – Tristate Logic
  • Buffer – Unidirectional and Bidirectional Buffer

Sequential Logic Circuit

  • Basic Memory Cell – RS-Latch using NAND and NOR
  • Triggering Methods – Edge Trigger and Level Trigger
  • SR Flip Flops
  • SR Flip Flops – Clocked SR Flip Flop with preset and clear
  • SR Flip Flops – Drawbacks of SR Flip Flop
  • JK Flip Flops – Clocked JK Flip Flop with Preset and Clear
  • JK Flip Flops – Race Around Condition in JK Flip Flop
  • JK Flip Flops – Master Slave JK Flip Flop
  • JK Flip Flops – D and T Type Flip Flop
  • JK Flip Flops – Excitation Table of Flip Flop
  • JK Flip Flops – Block Schematic and Functional Table of IC 7474, 7475
  • Shift Register – Logic Diagram of 4-bit Shift Registers – SISO, SIPO, PIPO, PISO
  • Shift Register – 4-Bit Universal Shift Register
  • Counters – Asynchronous Counter
  • Counters – Synchornous Counter
  • Counters – Decade Counter – IC 7490 as Decade Counter
  • Counters – IC 7490 as MOD-N Counter
  • Counters – Ring Counter
  • Counters – Twisted Ring Counter

Data Converters and PLDs

  • Data Converters – Types of DAC
  • Data Converters – Weighted Resistor Circuits
  • Data Converters – R-2R Ladder Circuit
  • Data Converters – DAC IC 0808 Specifications
  • Data Converters – ADC: Block Diagram, Types, and Working
  • Data Converters – Working of Dual-Slope ADC
  • Data Converters – Working of SAR DAC
  • Data Converters – Working of ADC IC 0808, 0809
  • Memory – RAM and ROM Basic Building Blocks
  • Memory – Read and Write Operations
  • Memory – Types of Semiconductor Memories
  • PLD – Basic Building Blocks
  • PLD – Types of PLDs – PLA, PAL, GAL
  • PLD – CPLD – Basic Building Blocks and Functionality

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